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Previous Datasheet Index Next Data Sheet PD - 9.1308A PRELIMINARY IRLZ34NS HEXFET(R) Power MOSFET D Logic-Level Gate Drive Advanced Process Technology l Surface Mount l Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated Description l l VDSS = 55V G S RDS(on) = 0.035 ID = 27A Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The D 2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. D 2 Pak Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 27 19 110 56 0.37 16 110 16 5.6 10 -55 to + 175 300 (1.6mm from case) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient (PCB Mount,steady-state)** Min. ---- ---- Typ. ---- ---- Max. 2.7 40 Units C/W To Order 11/11/96 Previous Datasheet Index Next Data Sheet IRLZ34NS Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Min. 55 --- --- --- --- 1.0 11 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.065 --- --- --- --- --- --- --- --- --- --- --- --- 8.9 100 29 21 Max. Units Conditions --- V VGS = 0V, I D = 250A --- V/C Reference to 25C, I D = 1mA 0.035 VGS = 10V, ID = 16A 0.046 VGS = 5.0V, I D = 16A 0.060 VGS = 4.0V, I D = 14A 2.0 V VDS = VGS , ID = 250A --- S VDS = 25V, I D = 16A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, TJ = 150C 100 V GS = 16V nA -100 VGS = -16V 25 ID = 16A 5.2 nC VDS = 44V 14 V GS = 5.0V, See Fig. 6 and 13 --- VDD = 28V --- I D = 16A ns --- RG = 6.5, VGS = 5.0V --- RD = 1.8, See Fig. 10 Between lead, nH 7.5 --- and center of die contact 880 --- VGS = 0V 220 --- pF VDS = 25V 94 --- = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD t rr Q rr t on Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions MOSFET symbol --- --- 27 showing the A G integral reverse --- --- 110 p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 16A, VGS = 0V --- 76 110 ns TJ = 25C, IF = 16A --- 190 290 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) D S Specification changes Rev. # 1 Parameters Old spec. VGS (Max.) 20 New spec. 16 Comments Decrease VGS ( Max). Specification Revision Date 5/1/96 Notes: Repetitive rating; pulse width limited by ISD 16A, di/dt 270A/s, VDD V(BR)DSS, max. junction temperature. ( See fig. 11 ) TJ 175C VDD = 25V, starting TJ = 25C, L = 610H Pulse width 300s; duty cycle 2%. RG = 25, IAS = 16A. (See Figure 12) Uses IRLZ34N data and test conditions ** When mounted on FR-4 board using minimum recommended footprint. For recommended footprint and soldering techniques refer to application note #AN-994. To Order Previous Datasheet Index Next Data Sheet IRLZ34NS 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOT TOM 2.5V TOP 1000 ID , D ra in -to -S o u rc e C u rre n t (A ) 100 ID , D ra in -to -S o u rc e C u rre n t (A ) 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 10 10 2.5 V 1 1 2.5 V 0.1 0.1 1 2 0 s PU LSE W ID TH T J = 25 C 10 100 A 0.1 0.1 1 2 0 s PU L SE W ID TH T J = 1 75 C 10 100 A V D S , Drain-to-S ource V oltage (V) V D S , Drain-to-S ource Voltage (V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 3.0 R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d ) I D = 2 7A I D , D r ain- to-S ourc e C urre nt (A ) 2.5 100 TJ = 2 5 C TJ = 1 7 5 C 10 2.0 1.5 1.0 1 0.5 0.1 2 3 4 5 6 V DS = 2 5 V 2 0 s P U L SE W ID TH 7 8 9 10 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10 V 100 120 140 160 180 A V G S , Ga te-to-S o urce V oltage (V ) T J , Junction T em perature (C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature To Order Previous Datasheet Index Next Data Sheet IRLZ34NS 1400 15 V G S , G a te -to -S o u rce V o lta g e (V ) 1200 V GS C is s C rss C i ss C oss = 0 V, f = 1M H z = C gs + C gd , Cds SH OR TE D = C gd = C d s + C gd I D = 16A V DS = 44V V DS = 28V 12 C , C a p a c ita n c e (p F ) 1000 800 9 C os s 600 6 400 C rs s 200 3 0 1 10 100 A 0 0 4 8 12 16 FO R TEST CIR CU IT SEE FIG UR E 13 20 24 28 32 A V D S , D rain-to-S ource Voltage (V ) Q G , T otal Gate C harge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , R e v e rse D ra in C u rre n t (A ) OPE R ATIO N IN TH IS A RE A LIMITE D BY R D S(o n) 100 I D , D ra in C u rre n t (A ) 100 10 s T J = 17 5C TJ = 2 5C 10 1 00s 10 1m s 1 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VG S = 0 V 1.8 A 1 1 T C = 25 C T J = 17 5C S ing le Pulse 10 10m s 2.0 A 100 V S D , S ource-to-Drain Voltage (V ) V D S , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area To Order Previous Datasheet Index Next Data Sheet IRLZ34NS 30 VDS 25 RD VGS RG I D , D ra in C u rre n t (A m p s) D.U.T. + 20 -VDD 5.0V 15 Pulse Width 1 s Duty Factor 0.1 % 10 Fig 10a. Switching Time Test Circuit VDS 90% 5 0 25 50 75 100 125 150 A 175 TC , C ase T em perature (C ) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Therm al Response (Z thJC ) D = 0.5 0 1 0.2 0 0 .1 0 0.05 0.1 0.02 0.01 S IN G LE P U LS E (TH E R M A L R E S P O NS E ) PD M t 1 t2 N o te s : 1 . D u ty fac to r D = t 1 / t2 0.01 0.00001 2 . P e a k T J = P D M x Z th J C + T C A 1 0.0001 0.001 0.01 0.1 t 1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case To Order Previous Datasheet Index Next Data Sheet IRLZ34NS VDS D.U.T. RG + V - DD 5.0 V E A S , S in g le P u ls e A va la n c h e E n e rg y (m J) L 250 TOP 200 BO TTOM ID 6 .6A 11A 16 A IAS tp 0.01 150 100 Fig 12a. Unclamped Inductive Test Circuit 50 V(BR)DSS tp VDD VDS 0 V D D = 2 5V 25 50 75 100 125 150 A 175 Starting TJ , Junction T emperature (C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 5.0 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit To Order Previous Datasheet Index Next Data Sheet IRLZ34NS Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS To Order Previous Datasheet Index Next Data Sheet IRLZ34NS D2Pak Package Details 10.54 (.415) 10.29 (.405) 1.40 (.055) MA X. -A2 4.69 (.185) 4.20 (.165) -B 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.18 (.243) 15.49 (.610) 14.73 (.580) 5.28 (.208) 4.78 (.188) 1.40 (.055) 1.14 (.045) 3X 5.08 (.200) 1.39 (.055) 1.14 (.045) 2.79 (.110) 2.29 (.090) 2.61 (.103) 2.32 (.091) 8.89 (.350) R EF . 10.16 (.400) R EF . 1.78 (.070) 1.27 (.050) 1 3 3X 0.93 (.037) 0.69 (.027) 0.25 (.010) M BAM 0.55 (.022) 0.46 (.018) M IN IM U M R EC OM M EN D ED F OOT PR IN T 11.43 (.450) N OT ES: 1 D IME NS IO N S AF TE R SO LD ER D IP. 2 D IME NS IO N IN G & T OLER AN C IN G PER AN SI Y14.5M, 1982. 3 C ON T RO LLIN G D IM ENS IO N : IN CH . 4 H EA TSIN K & LEA D D IM E N SIO NS DO NO T INC LU D E BU R R S. TRR 1 . 6 0 (.0 6 3 ) 1 . 5 0 (.0 5 9 ) 4 .1 0 (. 1 6 1 ) 3 .9 0 (. 1 5 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0 .3 6 8 (.0 1 4 5) 0 .3 4 2 (.0 1 3 5) LE AD ASSIGN M EN T S 1 - GAT E 2 - D RA IN 3 - SOU R C E 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2X 2.54 (.100) 2X F E ED D IR E C T IO N 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) Part Marking (This is an IRF530S with assembly lot code 9B1M ) A 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 10 . 90 (. 42 9 ) 10 . 70 (. 42 1 ) 1 .7 5 (. 06 9 ) 1 .2 5 (. 04 9 ) 1 6 .1 0 (.6 3 4 ) 1 5 .9 0 (.6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 ) F EE D D IR EC T IO N Tape & Reel 13 .5 0 (.5 32 ) 12 .8 0 (.5 04 ) 2 7.4 0 (1. 07 9 ) 2 3.9 0 (.9 41 ) 4 IN TE RN A TIO N A L R E C TIFIE R LO G O ASSEMBLY L OT C OD E PART NUMBER F 53 0 S 9 24 6 9B 1M D A TE C O DE (YY W W ) Y Y = Y EA R W W = W EEK 33 0 .00 (1 4 .1 73 ) M A X. 6 0.0 0 (2 .3 62 ) M IN . N O TES : 1 . C OM F OR M S TO EI A-4 18 . 2 . C ON TR OL L IN G D IM EN S IO N : M IL L IM ETE R . 3 . D IM E NS IO N M E AS U R ED @ H U B . 4 . IN C L U D ES FL AN GE D IS TOR T ION @ O U TE R E D GE . 2 6 .4 0 (1 .0 3 9) 2 4 .4 0 (. 96 1 ) 3 0 .4 0 (1 .1 9 7) M A X. 4 3 WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 11/96 To Order |
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